1. Field of the Invention
The present invention relates to a technology for decoding digitally-compressed video signals, and more particularly, to a video decoding apparatus for decoding signals of a plurality of channels in a multiplexed mode and a method therefor.
2. Description of the Related Art
In general, a Moving Picture Experts Group 2 (MPEG-2) High Definition (HD) specification decodes a compressed video stream transmitted at a rate of 30 frames 1920 horizontal pixels by 1080 vertical pixels per second. The amount of data transmitted in the MPEG-2 HD standard is six times as much as that of Standard Definition (SD) data which is transmitted at the rate of 30 frames 720 horizontal pixels by 480 vertical pixels per second. A decoder which can decode HD-class video signals can decode 6 channels of SD-class video signals. For example, it is assumed that there is a sportscasting program included among digital television services. If a plurality of channels related to the program, such as scenes taken from various angles, are transmitted as SD-class signals, a viewer can watch the scenes on one HD-class screen. Thus, SD-class video signals of a plurality of channels must be decoded in parallel at the same time in a digital television. Such a task requires respective hardware for each channel in order to independently control and process in parallel video signals of a plurality of channels according to field structures, 3:2 pull-down, decoding and display control method. Thus, the structure of a device for decoding video signals of a plurality of channels becomes complicated. In addition, if decoding is executed in software, it also requires an operating system-level algorithm for managing a decoding task of each video channel, which increases complexity.